The present invention relates to a nonvolatile memory device; and particularly, to a magneto-resistive random access memory (MRAM) including a magnetic tunnel junction (MTJ) element.
Most of the semiconductor manufacturing industries are developing a MRAM device as a next generation memory device. Generally, a MRAM uses a method of storing data bits using magnetic charges (i.e., in a magneto-resistive material) instead of the electrical charges used in a dynamic random access memory (DRAM). A metal is defined as magneto-resistive if it shows a slight change in electrical resistance when placed in a magnetic field. The MRAM uses the slight change for reading or writing data.
That is, the MRAM stores a magnetic polarization in stacked layers made of a magneto-resistive material. The magnetic field is set based on a combination of currents flowed in a bit line and a word line. The magnetic polarization is changed or sensed to write or read data. Having the high speed of static RAM and the high density of DRAM, MRAM could be used to significantly improve electronic products by storing greater amounts of data and enabling it to be accessed faster while consuming less battery power than existing electronic memory. In addition, like a flash memory, the MRAM allows for data retention even when the power supplied to the memory device is terminated.
The MRAM may comprise of a unit cell including various magneto-resistive materials such as a giant magneto resistance (GMR), a magnetic tunnel junction (MTJ), and so on.
The MRAM can be developed based on giant magneto-resistive (GMR) effect observed in thin film structures composed of alternating ferromagnetic and nonmagnetic layers as well as a spin torque transfer (STT) technique or spin transfer switching technique.
Herein, giant magneto-resistance (GMR) effect is a kind of quantum mechanical magneto-resistance effects. In the absence of an external magnetic field, the magnetization direction in adjacent ferromagnetic layers is antiparallel due to a weak anti-ferromagnetic coupling between layers. The result is high-resistance magnetic scattering as a result of electron spin. Otherwise, if an external magnetic field is applied, the magnetization of the adjacent ferromagnetic layers is parallel so that the result is lower magnetic scattering, and lower resistance.
Spin-transfer torque (STT) technique is a writing technology in which an electric current is spin polarized by aligning the spin direction of the electrons flowing through a magnetic element, i.e., reorienting the magnetization of a thin magnetic layer using a spin-polarized current. Then, the resultant resistance difference of the magnetic element is used for information readout.
FIG. 1 is a block diagram describing a conventional MRAM comprising of a plurality of unit cells, each having a 1T+1MTJ structure including one switching unit T and one MTJ element.
As shown, a cell array in the MRAM includes a plurality of word lines WL1 to WL4, a plurality of bit lines BL1 and BL2, a plurality of unit cells 1, and a plurality of sense amplifiers SA1 and SA2, each coupled to each bit line BL1 or BL2.
In detail, the plurality of bit lines BL1 and BL2 are arranged in a row, the plurality of word lines WL1 to WL4 are arranged in a column. At a region where the bit lines BL1 and BL2 and the word lines WL1 to WL4 intersect, the unit cell 1 is located.
The unit cell 1 includes the switching unit T configured to perform a switching operation in response to the word line WL and the MTJ element coupled between the bit line BL and the switching unit T. Herein, the switching unit can be constituted with a NMOS transistor of which switching operation is controlled by a gate control signal.
Coupled to each bit lines BL1 and BL2, the sense amplifiers SA1 and SA2 sense and amplify a cell data delivered via the bit lines BL1 and BL2.
In FIGS. 2a and 2b, operation of a conventional MTJ element is shown.
The conventional MTJ element changes electrical resistance according to polarities of two ferromagnetic plates. The MTJ element includes a free magnetic layer 2 having a changeable polarity in response to direction and strength of current flowing through the MTJ element or an external magnetic field, a tunnel junction layer 3, and a fixed magnetic layer 4 having a fixed polarity.
Herein, the free magnetic layer 2 and the fixed magnetic layer 4 generally may include NiFeCo/CoFe, and the tunnel junction layer 3 may include Al2O3. The free magnetic layer 2 and the fixed magnetic layer 4 are separated by the tunnel junction layer 3 as an insulating layer.
The free magnetic layer 2 and the fixed magnetic layer 4 have different thicknesses so that the fixed magnetic layer 4 only changes polarity in a strong magnetic field (i.e., remains fixed if the write current is kept below its threshold level) and the free magnetic layer 2 changes polarity in a week magnetic field.
If a current is applied to the free magnetic layer 2 and the fixed magnetic layer 4 in a vertical direction, current can flow based on an electron tunneling effect because the tunnel junction layer 3 is very thin.
Referring to FIG. 2a, in the case where the polarities of the free magnetic layer 2 and the fixed magnetic layer 4 are the same, a tunneling resistance of the tunnel junction layer 3 becomes low so that a large current flows and a sensing current becomes large.
Otherwise, referring to FIG. 2b, in the case where the polarities of the free magnetic layer 2 and the fixed magnetic layer 4 are different, a tunneling resistance of the tunnel junction layer 3 becomes high so that a small current flows and a sensing current becomes small.
As described above, a polarity of the free magnetic layer 2 is changed by an external magnetic field. According to the polarity of the free magnetic layer 2, information of “0” or “1” is stored. Thus, during a write operation, only a magnetic force large enough to change a polarity of the free magnetic layer 2, and not a polarity of the fixed magnetic layer 4 is applied.
FIG. 3 depicts a resistance characteristic according to currents flowing into the MTJ device.
The current-resistance characteristics of a MTJ device shows a hysteresis effect. In the MTJ device, when positive current flows from a bottom electrode attached to the fixed magnetic layer 4 into a top electrode attached to the free magnetic layer 2, a resistance becomes high and data of logic high level ‘1’ is written.
Otherwise, when negative currents flow from the top electrode attached to the free magnetic layer 2 into the bottom electrode attached to the fixed magnetic layer 4, a resistance becomes low and data of logic high level ‘0’ is written.
When the positive current goes over IswH, a resistance of the MTJ device is changed from a low resistance RL to a high resistance RH; otherwise, if the negative current goes under IswL, a resistance of the MTJ device is changed from the high resistance RH to the low resistance RL.
Accordingly, during a changing of resistance of the MTJ device, a potential between sides of the MTJ device is rapidly changed.
Referring to the hysteresis effect shown in FIG. 3, a large current IH (which is larger than IswH for operation margin) is applied to write data of ‘1’ so that a resistance of the MTJ device is changed from the low resistance RL to the high resistance RH. A potential between sides of the MTJ device is increased from a value of (IH×RL) to a value of (IH×RH).
Herein, the high resistance RH is over two-times larger than the low resistance RL. According to developments on ferromagnetic material and manufacturing processes, a difference between the high resistance RH and the low resistance RL may continuously become larger to increase a sensing margin.
In a semiconductor memory device, there may be various causes of error or malfunction as well as a resistor having larger than the high resistance RH. Further, currents of which are larger than the large current IH may be included. Thus, a potential of (IH×RH) can be too high to guarantee operation reliability.
If the potential is too high, a level of voltage applied to a thin insulting layer formed between two ferromagnetic layers can be changed. Additionally, if the current for writing data is larger than necessary or there is a change of parameters (e.g., a process, a voltage, a temperature, etc.) a stress over a break down field is supplied to the thin insulating layer so that operation reliability of unit cell can be decreased.
Particularly, regardless of data previously stored in the unit cell, a write driver provides current for writing operation to the MTJ device in response to inputted data of ‘0’ or ‘1’. Accordingly, since a strong electro-magnetic field may be applied to the thin insulating layer before a resistance of the MTJ device is transitioned, endurance of the unit cell can get worse.
A conventional write driver operates regardless of a potential between sides of the MTJ device during writing operation. Thus, if a current for a writing operation is not sufficient (e.g., decreased below required levels) due to circumstantial conditions, the writing operation cannot be normally performed. Otherwise, if the current is increased above the required levels, the unit cell may be destroyed.
FIGS. 4a and 4b are graphs describing switching current and switching probability in a writing operation. FIG. 4a depicts the change of switching current according to a pulse width of a current for writing operation, and FIG. 4b shows the switching probability versus the time the current is applied to a MTJ device.
Referring to FIG. 4a, as the pulse width of a writing current becomes narrower, a larger current density is required. That is, as the pulse width of a writing current becomes narrower, an average current density becomes higher.
According to circumstantial conditions in a chip, the switching current can be smaller than desired amount. In a conventional memory device technology providing a pulse width of current in response to designed current intensity, a writing operation may be performed normally. Herein, it is difficult to design the pulse width of a current which has a sufficient operation margin because of large power consumption or operating speed reduction.
Referring to FIG. 4b, as a writing time becomes shorter, the switching probability decreases. That is, if the time that the writing current is applied is too short, a writing operation may not be performed normally.